Analysis of ×86 instruction set usage for DOS/Windows applications and its implication on superscalar design

The understanding of instruction set usage in typical DOS/Windows applications plays a very important role in designing high performance x86 compatible microprocessors. This paper presents the tools to such analysis, the analysis results, and their implications on the design of a superscalar processor, based on a RISC core, for efficient x86 instruction execution. The analysis tools include monitoring systems for both DOS and Windows 95 applications, either with or without source code. Many commercial software programs are analyzed, including MS Word, MS Excel, Netscape, Netterm, DOS commands, etc. The analyzed results reported in this paper include execution frequencies of x86 instructions, the execution frequency of micro-operations that implement the x86 operations, the average cycles per x86 instruction and per micro operations, and the average number of micro operations in an x86 instruction. The analyzed results are used to determine many important design parameters of the superscalar processor, including the decoder combination and hardware optimization for frequently executed instructions. The analysis guides us to optimize the implementations of register-to-register move, push and pop operations, which result in 17.4% reduction in micro operation cycles and 32% reduction in the loading of the integer unit at very minor hardware cost. The reduction in the integer unit’s loading may result in less number of integer units needed in the superscalar architecture. 1 This work is supported by NSC under contract numbers 85-2262-E-009-010R and 86-2262E-009-009. Accepted to International Conference on Computer Design, 1998